This invention relates generally to the computer disk drive art. In particular, the present invention pertains to a method of achieving multiple data transfer rates in floppy disk drive controllers for industry standard compatibility.
Disk drive controllers, sometimes referred to as input/output (I/O) processors, control the operation of the disk drive. The disk drive controller board is located in the mainframe of the computer and is responsible for the control, monitoring, and overall operation of the floppy disk drive device. The concept of disk drive control by the means of a disk drive controller board is an accepted industry standard and has proven to be a highly efficient method of disk drive operation. In earlier systems, disk drive control had been the responsibility of the main Central Processing Unit (CPU). The use of a separate controller board frees the CPU from this mundane task allowing the CPU to attend to other duties and commands, thereby enhancing overall system operating speed.
The disk drive controller board configuration also allows for faster storage access times. The function of the floppy disk drive is to store (write) to a disk data present in the main memory (typically random access memory (RAM)) and to retrieve (read) data from a disk to be loaded into the RAM main memory. The rate or speed at which the disk drive reads or writes the information (data) to or from the floppy disk is referred to as the data transfer rate, expressed in bits per second (b/s) or as a frequency. The data transfer rate and the read/write commands are controlled by the disk drive controller.
Floppy disk drives have evolved from the low density data storage devices of earlier computer systems to the much higher density storage devices of current production computers. The data density of a floppy disk is defined as the number of bits that can be stored in a given length of recording surface.
The performance of floppy disks and disk drive devices has increased as the industry and technology have continued to evolve. As disk drive performance, floppy disk manufacturing techniques, and data storage techniques have improved the industry standards have changed accordingly. Most importantly, read and write speed frequencies have increased primarily because of an increased disk storage capacity resulting from a higher packing density of data. Disk drive transport speeds have changed slightly which has altered the format encoding scheme of the disk. These industry changes have created certain incompatibilities between newer and older systems. As an example of incompatibility, data written to a disk at the rate of 250 kHz cannot be read at the rate of 500 kHz. Though all of the data bits would be present on the disk, the space or area between the bits would appear to be twice as large with a read rate of 500 kHz. The result is a spatial differential ratio arising from the ratio of the read rate to the write rate. For this reason, a method was required to accommodate the changes in industry standards while maintaining compatibility.
An earlier method of achieving multiple data transfer rates involved the employment of numerous switched or independent oscillators. Each independent oscillator would be fixed for a particular rate of data transfer. On command from the disk drive controller or the CPU, the control circuitry would "switch" to the oscillator required for the needed transfer rate. This switching action would often result in a sharp increase of static electronic modulation (a switching "spike") and could affect the control circuitry with unwanted asynchronous signals. Unless extensive filtering networks were employed, increased radio frequency interference could result. Also, timing delay and frequency phase correction circuitry was required to control the asynchronous signals present with this method. The additional components, separate oscillators and the respective supporting circuitry further resulted in an increased cost to accomplish the desired result.
The present invention is intended to provide a method of selecting different data transfer rates in a unique manner, allowing full compatibility with the established industry standard data transfer rates without a need for different independent frequency oscillators.